1. Field of the Invention
The present invention relates to a power supply circuit, and more particularly relates to a power supply circuit able to suppress inrush current generated at the moment when a power source is turned on and able to decrease power consumption when an electronic device is in a sleep mode.
2. Description of the Related Art
As for an electronic device, a power supply circuit is absolutely imperative. In conventional techniques, the power supply circuit for the electronic device has plural structures in general. One of them is taken as an example for illustration as follows.
FIG. 1 illustrates a main part of a power supply circuit 1 in the conventional techniques. In what follows, the working principle of the power supply circuit 1 in the conventional techniques is described by referring to FIG. 1.
As shown in FIG. 1, the power supply circuit 1 has a power source 11, a mechanical switch 17, an electronic switch 12, a current limiting resistor RL, a power source voltage detecting circuit 13, a control unit 15, and a load 16. The electronic switch 12 is, for example, a current controlled unit FET, and the control unit 15 is, for example, a MCU. The power source 11 outputs power source voltage V1 for providing direct current to the load 16. The power source voltage detecting circuit 13 is used for detecting the power source voltage V1 downstream of the mechanical switch 17. After the power source voltage detecting circuit 13 has detected the power source voltage V1, it outputs a first voltage control signal C1 to the MCU. After the MCU has received the first voltage control signal C1, it outputs a second voltage signal C2 to the FET. The FET is turned on after receiving the second voltage signal C2.
However, during a delay time period T from the time point when the first voltage control signal C1 is generated to the time point when the second voltage control signal C2 is generated, the FET is in a turn-off state. In this time period T, the power source voltage V1 provides electricity to the load 16 via the current limiting resistor RL. At this time, the power source voltage V1 is not directly applied to the load 16 via a switch component, but provides electricity to the load 16 via the current limiting resistor RL. That is to say, the current value provided to the load 16 via the current limiting resistor RL is I=V1/RL. As a result, in the power supply circuit 1, inrush current generated at the moment when the power source 11 is turned on is suppressed by disposing a series-connected current limiting resistor RL between the power source 11 and the load 16.
However, in a case where the power supply circuit 1 is in a sleep mode, although the FET is turned off, the power source voltage V1 may still generate a loop via the current limiting resistor RL, and consume unnecessary power. Moreover, the power supply circuit 1 cannot satisfy the strict requirements of the Energy Star program with the conventional techniques.
Therefore, in a power supply circuit, how to not only be able to suppress the inrush current generated at the moment when a power source is turned on but also be able to decrease the power consumed when an electronic device is in a sleep mode has become a problem that needs to be solved.